Overview

The CHIP_EN is a reset control module designed to manage system-level reset logic.

CHIP_EN supports three reset modes: Level Reset, Interrupt Reset, Pulse Reset. The module offers debounce function, allowing user-configurable debounce time 0μs ~ 16ms, with a default setting of 100μs.

User can control the input signal to the CHIP_EN module via an external button or a host device.

The initial power-on sequence should follow the specification of Section CHIP_EN Reset Sequence in Datasheet.

Note

  • The module’s timer clock has an approximately 50% deviation, which must be considered when setting time-related thresholds.

  • The duration of input signal mentioned below refers to the time post-debounce processing.

Operation Modes

CHIP_EN supports three operation modes for distinct application scenarios:

  • Level Reset Mode: suitable for scenarios requiring basic reset functionality.

  • Interrupt Reset Mode: suitable for scenarios when the device needs to enter low power mode or requires wake-up function. This functions is similar to a smartphone’s power button:

    • Short press: Toggles screen on/off.

    • Long press: Prompts the user to reboot the device or not.

  • Pulse Reset Mode: suitable for scenarios that a button pressed requires a reset and different responses are needed based on the duration of the press. Similar to that router device is restored to factory settings.

Level Reset Mode

In this mode, the system stays powered off when the CHIP_EN module receives a low-level input signal. Once this signal switches to a high-level, the SoC initiates a reboot sequence.

Interrupt Reset Mode

Interrupt Reset Mode is primarily used for power-saving scenarios.

This mode supports two interrupt events: Short-Press interrupt and Long-Press interrupt, as well as a Reset event.

Short-Press Interrupt Event:

This event is triggered when the low-level duration (Tlow) exceeds the user-defined short-press threshold (Tsp).

Long-Press Interrupt Event:

This event is triggered when the low-level duration (Tlow) exceeds the sum of the short-press threshold (Tsp) and the long -ress threshold (Tlp).

Reset Event:

When a long-press interrupt event triggered, if the program doesn’t clear the long-press interrupt status within Tack, a reset will occur, as shown by the Reset in the following figure.

The SoC will reboot when the signal goes to a high-level.

../../_images/chipen_tsp_tlp_noack_reset.svg

Reset occurs when no-ack after a long-press interrupt

Note

After rebooting, the CHIP_EN will enter Level Reset Mode. To operate in Interrupt Reset Mode, the working mode needs to be reconfigured.

Pulse Reset Mode

In this mode, a low-level input signal to CHIP_EN directly will trigger a reset operation and the SoC will reboot immediately.

After rebooting, users can continuously monitor the low-level input signal via CHIPEN_IsPress(), to distinguish between short press and long press operations.

Attention

Once the chip is configured in pulse reset mode, the software cannot change this mode anymore. Only powering off the chip will revert it to Level Reset Mode.

Demo for Configuration

Pulse Reset Mode

/* step1: set debounce time */
CHIPEN_DebounceSet(debouce_time);

/* step2: set work mode to Pulse Reset Mode */
CHIPEN_WorkMode(CHIPEN_PULSE_RESET_MODE);

/* step3: acquire the state of input signal to CHIP_EN */
ret = CHIPEN_IsPress();

Interrupt Reset Mode

/* step1: set debounce time */
CHIPEN_DebounceSet(debouce_time);

/* step2: set work mode to Interrupt Reset Mode */
CHIPEN_WorkMode(CHIPEN_INT_RESET_MODE);

/* step3: set short press threshold and long press threshold */
CHIPEN_ThresHoldSet(longpress_time, shortpress_time);

/* step4: set ack time */
CHIPEN_AckTimeSet(ack_time);

/* step5: register interrupt handler and enable interrupt */
InterruptRegister((IRQ_FUN) chipen_irq_handler, PWR_DOWN_IRQ, (u32)NULL, 3);
InterruptEn(PWR_DOWN_IRQ, 3);

/* step6: response to interrupt event */
void chipen_irq_handler(void)
{
    /* acquire interrupt event */
    u32 INTrBit = CHIPEN_GetINT();

    /* short-press interrupt event */
    if(INTrBit & AON_BIT_CHIPEN_SP_ISR) {
        /* clear short-press interrupt status */
        CHIPEN_ClearINT(INTrBit);

        /* handle relevant tasks according to the application scenarios */
        {
           /*
              do something
           */
        }
     }

    /* long-press interrupt event */
    if (INTrBit & AON_BIT_CHIPEN_LP_ISR) {

        /* handle whether to delay clearing the interrupt status */
        if (/* need to reset */) {
           /* delay clearing the interrupt status */
           DelayMs(clear_int_delay);

        } else (/* no need to reset */) {
           /* clear the interrupt status immediately */
        }

        /* clear long-press interrupt status */
        CHIPEN_ClearINT(INTrBit);
    }
}