Introduction
To maximize design flexibility under limited pin resources, the chip provides a pin multiplexing (Pinmux) solution. Each pin can be configured to connect to different internal IP circuits.
For the specific mapping between pins and IP circuits, refer to the provided Pinmux table.
Ensure compliance with the following Pinmux guidelines to prevent unexpected behavior and usage issues before development.
Function Multiplexing
Function ID 0~18
For functions with ID number among 0~18, each pin can only be connected to a fixed signal of a certain IP. The functions that can be configured on a pin are very limited, but a dedicated design can maximize the performance of each IP.
Note
For example, both function ID 8 and function ID 29~32 implement SPI functionality. Since function ID 8 is a dedicated pin, it achieves a maximum SPI clock speed of 50MHz (master mode); while the maximum speed of the full-cross pins associated with function ID 29~32 are limited to 12.5 MHz (master mode).
Taking PB30 as an example: when configuring the function ID of PB30 to 1, the pin will be directly connected to the UART1_RXD signal of the UART1 via pinmux.
Refer to the pinmux table for the specific function distribution available on each pin.
Schematic diagram of pinmux connection of PB30
Function ID 19~81
For functions with ID number after 19, each pin can be flexibly connected to different signals of a certain IP. This method maximizes the freedom of use, but the scope of use and some IPs’ performance (maximum transfer speed) is limited.
Taking PA12 as an example: you can connect PA12 with the UART0_TXD signal of UART0 by configuring the function ID of PA12 to 19, and can also connect PA12 with the UART0_RXD signal of UART0 by configuring the function ID of PA12 to 20.
For details, refer to the pinmux table.
Schematic diagram of pinmux connection of PA12
Function ID 0~19
For functions with ID number among 0~19, each pin can only be connected to a fixed signal of a certain IP. The functions that can be configured on a pin are very limited, but a dedicated design can maximize the performance of each IP.
Note
For example, both function ID 6 and function ID 32~35 implement SPI functionality. Since function ID 6 is a dedicated pin, it achieves a maximum SPI clock speed of 50MHz (master mode); while the maximum speed of the full-cross pins associated with function ID 32~35 are limited to 12.5 MHz (master mode).
Taking PA0 as an example: when configuring the function ID of PA0 to 1, the pin will be directly connected to the UART1_RXD signal of the UART1 via pinmux.
Refer to the pinmux table for the specific function distribution available on each pin.
Schematic diagram of pinmux connection of PA0
Function ID 20~67
For functions with ID number after 20, each pin can be flexibly connected to different signals of a certain IP. This method maximizes the freedom of use, but the scope of use and some IPs’ performance (maximum transfer speed) is limited.
Note
These function IDs can only be configured on PA8~PA31 and PB0~PB10.
Taking PA11 as an example: you can connect PA11 with the UART0_TXD signal of UART0 by configuring the function ID of PA11 to 20, and can also connect PA11 with the UART0_RXD signal of UART0 by configuring the function ID of PA12 to 21.
For details, refer to the pinmux table.
Schematic diagram of pinmux connection of PA11
Function ID 0~19
For functions with ID number among 0~19, each pin can only be connected to a fixed signal of a certain IP. The functions that can be configured on a pin are very limited, but a dedicated design can maximize the performance of each IP.
Note
For example, both function ID 6 and function ID 32~35 implement SPI functionality. Since function ID 6 is a dedicated pin, it achieves a maximum SPI clock speed of 50MHz (master mode); while the maximum speed of the full-cross pins associated with function ID 32~35 are limited to 12.5 MHz (master mode).
Taking PA0 as an example: when configuring the function ID of PA0 to 1, the pin will be directly connected to the UART1_RXD signal of the UART1 via pinmux.
Refer to the pinmux table for the specific function distribution available on each pin.
Schematic diagram of pinmux connection of PA0
Function ID 20~67
For functions with ID number after 20, each pin can be flexibly connected to different signals of a certain IP. This method maximizes the freedom of use, but the scope of use and some IPs’ performance (maximum transfer speed) is limited.
Note
These function IDs can only be configured on PA8~PA31 and PB0~PB10.
Taking PA11 as an example: you can connect PA11 with the UART0_TXD signal of UART0 by configuring the function ID of PA11 to 20, and can also connect PA11 with the UART0_RXD signal of UART0 by configuring the function ID of PA12 to 21.
For details, refer to the pinmux table.
Schematic diagram of pinmux connection of PA11
Function ID
Each pin can only be connected to a fixed signal of a certain IP.
Taking PA0 as an example: when configuring the function ID of PA0 to 1, the pin will be directly connected to the UART2_RXD signal of the UART2 via pinmux.
Refer to the pinmux table for the specific function distribution available on each pin.
Schematic diagram of pinmux connection of PA0
Note
If
PA9~PA16andPB25~PB31are used, the I/O power can be set to either 1.8V or 3.3V.PA20~PB6are audio functions by default.If
PA20~PB6are used as other functions, ensure the I/O power only be set to 1.8V. For more information about I/O power, refer to pinmux table.
Audio Function
If the pins PA20~PB6 are used as audio function and digital function simultaneously, pay attention to the layout of digital function as far as possible from the trace of audio function to avoid interference.
It’s not suggested to use PA18 ~ PB6 as normal digital functions.
ADC/Cap-Touch Function
If the pins PA0~PA8 are used as ADC or Cap-Touch functions, pay attention to the layout especially for Cap-Touch. Because the performance is related to parasitic capacitance, refer to ADC/CTC layout guide for more information.
Pinmux Signal Description
For detailed signal description, refer to UM0602_RTL8730E_pinmux.xlsx.
Trap Pins
During the process of power on, the internal circuit will latch the conditions of several pins to determine entry into various modes. The trap pins and descriptions are listed in the table below.
Pin name |
Symbol |
Active level |
Description |
|---|---|---|---|
PB31 |
TM_DIS |
Low |
Test Mode Disable, default internal pull up.
It is for internal test only and should be logical high for normal operation.
|
PB5 |
UD_DIS |
Low |
UART Download Disable, default internal pull up
|
Pin name |
Symbol |
Active level |
Description |
|---|---|---|---|
PA1 |
TM_DIS |
Low |
Test Mode Disable, default internal pull up
It is for internal test only and should be logical high for normal operation.
|
PA20 |
UD_DIS |
Low |
UART Download Disable, default internal pull up
|
PA22 |
PSO_SEL |
- |
Power Supply Option Selection
|
Pin name |
Symbol |
Active level |
Description |
|---|---|---|---|
PA1 |
TM_DIS |
Low |
Test Mode Disable, default internal pull up
It is for internal test only and should be logical high for normal operation.
|
PA20 |
UD_DIS |
Low |
UART Download Disable, default internal pull up
|
PA22 |
PSO_SEL |
- |
Power Supply Option Selection
|
I/O name |
Trap pin name |
Active level |
Description |
|---|---|---|---|
PB22 |
TM_DIS |
Low |
Test Mode Disable, default internal pull up
It is for internal test only and should be logical high for normal operation.
|
PB24 |
UD_DIS |
Low |
UART Download Disable, default internal pull up
|
Note
The trap pin needs to select the external pull-up and pull-down voltages according to the I/O power supply.
Wake Pins & SWD Pins
Wake Pins
The pins PB30 and PB31 are directly connected to the wake-up circuit which is used to wake up the system from deep-sleep state.
Note
Disable the wake-up function first before multiplexing these pins for other purposes.
SWD Pins
The pins PA30 and PA31 are forced to SWD function by default. To multiplex these two pins for other functions, call sys_jtag_off() or Pinmux_Swdoff() before switching.
Wake Pins
The pins PA0 and PA1 are directly connected to the wake-up circuit which is used to wake up the system from deep-sleep state.
Note
Disable the wake-up function first before multiplexing these pins for other purposes.
SWD Pins
The pins PB0 and PB1 are forced to SWD function by default. To multiplex these two pins for other functions, call sys_jtag_off() or Pinmux_Swdoff() before switching.
Wake Pins
The pins PA0 and PA1 are directly connected to the wake-up circuit which is used to wake up the system from deep-sleep state.
Note
Disable the wake-up function first before multiplexing these pins for other purposes.
SWD Pins
The pins PB0 and PB1 are forced to SWD function by default. To multiplex these two pins for other functions, call sys_jtag_off() or Pinmux_Swdoff() before switching.
Wake Pins
The pins PB21/PB22/PB23/PB31 are directly connected to the wake-up circuit which is used to wake up the system from deep-sleep state.
Note
Disable the wake-up function first before multiplexing these pins for other purposes.
SWD Pins
The pins PA13 and PA14 are forced to SWD function by default. To multiplex these two pins for other functions, call sys_jtag_off() or pinmux_Swdoff() before switching.